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000065_isdn-distribution-owner_Tue Aug 31 12:51:01 1993.msg
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Received: from nac.no ([129.240.2.40]) by relay.cs.toronto.edu with SMTP id <452067>; Tue, 31 Aug 1993 12:50:56 -0400
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Date: Tue, 31 Aug 1993 11:52:42 -0400
X400-Originator: isdn-request@teknologi.agderforskning.no
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DL-Expansion-History: isdn@teknologi.agderforskning.no ; Tue, 31 Aug 1993
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From: " (Pat Sullivan)" <psullivn@dtsa.osd.mil>
Message-ID: <9308311549.AA01172@dtsa.osd.mil>
To: isdn@teknologi.agderforskning.no
Subject: BISDN Electronics Question
>From psullivn Tue Aug 31 11:44:59 1993
Return-Path: <psullivn>
Received: by dtsa.osd.mil (4.1/SMI-4.1)
id AA01152; Tue, 31 Aug 93 11:44:32 EDT
Date: Tue, 31 Aug 93 11:44:32 EDT
From: psullivn (Pat Sullivan)
Message-Id: <9308311544.AA01152@dtsa.osd.mil>
To: ADV-ELO@UTFSM.BITNET
Subject: Re: ?Hello?
Cc: adv-elo%utfsm.bitnet@cunyvm.cuny.edu, psullivn
Status: R
I'll try a question. Does anyone know of a minimum level of
IC integration/feature size that is required to do ATM or
SONET/SDH chipsets? What is the most common choice in
implementing ATM or SONET/SDH in hardware, and is this
because of a technical requirement of ATM or of SONET/SDH or
just because it's where IC technology is now?
Thanks
Pat Sullivan
Office of the Secretary of Defense
Arlington, Virginia.